1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of forming a device isolation structure in a semiconductor device employing an SOI (Silicon On Insulator) substrate.
2. Description of the Background Art
FIG. 44 is a cross-sectional view of a background art semiconductor device employing an SOI substrate. The SOI substrate which includes a silicon substrate 101, a buried oxide film 102 and an SOI layer 103 has first and second device formation regions and a device isolation region. In each of the first and second device formation regions, a multilayer structure including a gate oxide film 104 and a gate electrode 105 formed on the gate oxide film 104 is selectively formed on an upper surface of the SOI layer 103. In the device isolation region, an isolation oxide film 106 is formed on the upper surface of the SOI layer 103.
The structure of the semiconductor device shown in FIG. 44 is described in detail hereinafter using an instance where an N-channel MOS transistor is formed in each of the first and second device formation regions. A channel formation region 107 doped with a p-type impurity of a concentration of, for example, 1xc3x971017 to 1xc3x971018/cm3is formed under each of the gate electrodes 105 in the SOI layer 103. A well region 109 doped with a p-type impurity of a concentration of, for example, 1xc3x971017 to 5xc3x971018/cm3 is formed under the isolation oxide film 106 in the SOI layer 103. A body region 110 doped with a p-type impurity of a concentration of, for example, 1xc3x971019 to 1xc3x971021/cm3 is selectively formed in the well region 109. A source/drain region 108 doped with an n-type impurity of a concentration of, for example, 1xc3x971019 to 1xc3x971021/cm3 is formed between each of the channel formation regions 107 and the well region 109 in the SOI layer 103.
An interlayer insulation film 111 is formed entirely on the SOI layer 103. Contact holes 112 are selectively formed extending through the interlayer insulation film 111 from an upper surface of the interlayer insulation film 111 to the upper surface of the SOI layer 103 where the source/drain regions 108 are formed. A contact hole 114 is formed extending through the interlayer insulation film 111 and the isolation oxide film 106 from the upper surface of the interlayer insulation film 111 to the upper surface of the SOI layer 103 where the body region 110 is formed. The contact holes 112 and 114 are filled with a conductor.
A source/drain electrode 113 is formed on the upper surface of the interlayer insulation film 111 where each of the contact holes 112 is formed. The conductor which fills the contact holes 112 establishes electric connections between the source/drain electrodes 113 and the source/drain regions 108. A substrate electrode 115 is formed on the upper surface of the interlayer insulation film 111 where the contact hole 114 is formed. The conductor which fills the contact hole 114 establishes an electric connection between the substrate electrode 115 and the body region 110.
A method of forming the isolation oxide film 106 in the semiconductor device shown in FIG. 44 is described hereinafter. FIGS. 45 through 47 are cross-sectional views showing the background art method of forming the isolation oxide film 106 in order of process steps. Initially, a silicon oxide film 120 is formed by the CVD process and the like on the upper surface of the SOI layer 103 in which the channel formation regions 107 and the well region 109 are formed (FIG. 45). Then, a photoresist 121 is formed on the silicon oxide film 120 in the device isolation region by the photolithographic technique (FIG. 46). Using the photoresist 121 as a mask, anisotropic dry etching such as RIE (Reactive Ion Etching) which exhibits a higher etch rate in a direction of the depth of the SOI substrate is performed on the silicon oxide film 120 to expose the upper surface of the SOI layer 103. An unetched part of the silicon oxide film 120 serves as the isolation oxide film 106. Thereafter, the photoresist 121 is removed (FIG. 47).
Such a background art method of forming the isolation oxide film is disadvantageous in that the dry etching is performed until the SOI layer 103 is exposed for the formation of the isolation oxide film 106 to form a damaged layer 123 containing defects 122 in the upper surface of the SOI layer 103 in the first and second device formation regions. Since heavy metals and the like are prone to accumulate in the damaged layer 123 and the SOI substrate includes the buried oxide film between the SOI layer and the silicon substrate, the SOI substrate is more difficult to recover from the damage to the SOI layer by heat treatment and the like than a CZ substrate and an FZ substrate. Thus, the gate oxide film 104 formed on the SOI layer 103 having the damaged layer 123 is decreased in reliability.
A first aspect of the present invention is intended for a method of forming a device isolation structure for providing electrical isolation between first and second semiconductor devices formed respectively in first and second device formation regions of an SOI substrate, the device isolation structure being formed on a device isolation region between the first and second device formation regions of the SOI substrate. According to the present invention, the method comprises the steps of: (a) forming at least a first insulation film and a first film in stacked relation in the order named on a main surface of the SOI substrate; (b) removing the first film in the first and second device formation regions; and (c) removing the first insulation film in the first and second device formation regions by wet etching.
Preferably, according to a second aspect of the present invention, in the method of the first aspect, the first film includes a second insulation film different in material from the first insulation film; and the first film is removed by anisotropic dry etching which exhibits a higher etch rate in a direction of the depth of the SOI substrate in the step (b).
Preferably, according to a third aspect of the present invention, in the method of the second aspect, the first insulation film is a silicon oxide film, and the second insulation film is a silicon nitride film.
Preferably, according to a fourth aspect of the present invention, in the method of the first aspect, the first film includes a conductive film, and the step (a) comprises the step of forming a second insulation film on the first film. The method further comprises the step of (d) forming a third insulation film at a side surface of the first film, the step (d) being performed after the step (c).
Preferably, according to a fifth aspect of the present invention, in the method of the fourth aspect, the conductive film is a polysilicon film doped with an impurity, and the step (d) comprises the steps of: (d-1) thermally oxidizing a surface of a resultant structure provided in the step (c); and (d-2) removing a thermal oxide film formed in the step (d-1) by the thermal oxidation of the main surface of the SOI substrate in the first and second device formation regions.
Preferably, according to a sixth aspect of the present invention, the method of the fifth aspect further comprises the step of (e) forming a sidewall including a fourth insulation film on respective side surfaces of the first insulation film, the first film and the second insulation film, the step (e) being performed after the step (d).
Preferably, according to a seventh aspect of the present invention, in the method of the sixth aspect, the step (e) comprises the steps of: (e-1) forming a fifth insulation film on a resultant structure provided in the step (d); (e-2) forming a sixth insulation film on the fifth insulation film; (e-3) performing anisotropic dry etching which exhibits a higher etch rate in a direction of the depth of the SOI substrate on the sixth insulation film by using the fifth insulation film as an etch stopper; and (e-4) removing the fifth insulation film exposed in the step (e-3) by wet etching.
Preferably, according to an eighth aspect of the present invention, the method of any one of the fourth to seventh aspects further comprises the step of (f) exposing the first film to ultraviolet light after all manufacturing steps using plasma.
A ninth aspect of the present invention is intended for a method of forming a device isolation structure for providing electrical isolation between first and second semiconductor devices formed respectively in first and second device formation regions of an SOI substrate, the device isolation structure being formed on a device isolation region between the first and second device formation regions of the SOI substrate. According to the present invention, the method comprises the steps of: (a) forming a first insulation film on a main surface of the SOI substrate; (b) removing the first insulation film in the first and second device formation regions by anisotropic dry etching which exhibits a higher etch rate in a direction of the depth of the SOI substrate; (c) thermally oxidizing the main surface of the SOI substrate exposed in the step (b) to form a thermal oxide film; and (d) removing the thermal oxide film.
Preferably, according to a tenth aspect of the present invention, the method of the ninth aspect further comprises the step of (e) forming a sidewall including a second insulation film on a side surface of the first insulation film in the device isolation region, the step (e) being performed after the step (d).
Preferably, according to an eleventh aspect of the present invention, in the method of the tenth aspect, the step (e) comprises the steps of: (e-1) forming a third insulation film on a resultant structure provided in the step (d); (e-2) forming a fourth insulation film on the third insulation film; (e-3) performing anisotropic dry etching which exhibits a higher etch rate in a direction of the depth of the SOI substrate on the fourth insulation film by using the third insulation film as an etch stopper; and (e-4) removing the third insulation film exposed in the step (e-3) by wet etching.
A twelfth aspect of the present invention is intended for a method of forming a device isolation structure for providing electrical isolation between first and second semiconductor devices formed respectively in first and second device formation regions of an SOI substrate, the device isolation structure being formed on a device isolation region between the first and second device formation regions of the SOI substrate. According to the present invention, the method comprises the steps of: (a) forming a first film on a main surface of the SOI substrate; (b) removing the first film in the device isolation region to form a recessed part; (c) filling the recessed part with a second film serving as an insulation film; and (d) removing the first film in the first and second device formation regions by wet etching.
According to a thirteenth aspect of the present invention, a semiconductor device comprises: an SOI substrate; and a device isolation structure including a first insulation film, a conductive film and a second insulation film which are arranged in stacked relation in the order named on a device isolation region of the SOI substrate.
Preferably, according to a fourteenth aspect of the present invention, in the semiconductor device of the thirteenth aspect, the device isolation structure includes a thermal oxide film on a side surface of the conductive film.
Preferably, according to a fifteenth aspect of the present invention, in the semiconductor device of the thirteenth aspect, the device isolation structure further includes a sidewall including a third insulation film and formed on respective side surfaces of the first insulation film, the conductive film and the second insulation film.
In accordance with the first aspect of the present invention, the first insulation film is removed by the wet etching to expose the main surface of the SOI substrate in the first and second device formation regions in the step (c). Therefore, the formation of a damaged layer in the main surface of the SOI substrate is avoided when the device isolation structure is formed.
In accordance with the second aspect of the present invention, the first film is removed by the anisotropic dry etching, and only the first insulation film is removed by the wet etching which is isotropic. Therefore, the first film which is relatively thick is formed on the first insulation film which is relative thin in the step (a), whereby the device isolation structure is generally of an anisotropically etched configuration.
In accordance with the third aspect of the present invention, the anisotropic dry etching in the step (b) is performed on condition that the etch rate of the silicon nitride film is higher than that of the silicon oxide film, to allow the removal of the silicon nitride film only.
In accordance with the fourth aspect of the present invention, since the device isolation structure has the conductive film formed therein, a capacitor may be formed between the device isolation structure and the SOI substrate to enhance the isolation performance of the device isolation structure. Additionally, the first to third insulation films can provide electrical isolation between the conductive film and the SOI substrate.
In accordance with the fifth aspect of the present invention, the thermal oxidation in the step (d-1) accelerates the oxidation of the polysilicon film doped with the impurity. Then, when the thermal oxide film is removed in the step (d-2), the thermal oxide film formed in the side surface of the polysilicon film by the accelerated oxidation is left to serve as the third insulation film. Additionally, since the thermal oxide film is also formed in the main surface of the SOI substrate in the first and second device formation regions, the removal of the thermal oxide film in the step (d-2) allows the SOI substrate in the first and second device formation regions to be thinner than that in the device isolation region.
In accordance with the sixth aspect of the present invention, the formation of the sidewall may reduce the difference in level of the main surface of the SOI substrate on a boundary between the first and second device formation regions and the device isolation region which arises from the removal of the thermal oxide film. This suppresses the generation of a parasitic MOS transistor resulting from the level difference.
In accordance with the seventh aspect of the present invention, the fifth insulation film is removed by the wet etching to expose the main surface of the SOI substrate in the step (e-4). Therefore, the formation of a damaged layer in the surface of the SOI substrate is avoided when the sidewall is formed.
In accordance with the eighth aspect of the present invention, exposing the first film to ultraviolet light causes electric charges introduced in the first film in the manufacturing steps using plasma to be discharged.
In accordance with the ninth aspect of the present invention, the thermal oxide film is also formed in the main surface of the SOI substrate in the step (c). If a damaged layer is formed in the main surface of the SOI substrate by the anisotropic dry etching in the step (b), the removal of the thermal oxide film in the step (d) also removes the damaged layer.
In accordance with the tenth aspect of the present invention, the formation of the sidewall may reduce the difference in level of the main surface of the SOI substrate on a boundary between the first and second device formation regions and the device isolation region which arises from the removal of the thermal oxide film. This suppresses the generation of a parasitic MOS transistor resulting from the level difference.
In accordance with the eleventh aspect of the present invention, the third insulation film is removed by the wet etching to expose the main surface of the SOI substrate in the step (e-4). Therefore, the formation of a damaged layer in the surface of the SOI substrate is avoided when the sidewall is formed.
In accordance with the twelfth aspect of the present invention, the first film in the first and second device formation regions is removed by the wet etching in the step (d) to expose the main surface of the SOI substrate. Therefore, the formation of a damaged layer in the main surface of the SOI substrate is avoided when the device isolation structure including the second film is formed.
In accordance with the thirteenth aspect of the present invention, since the device isolation structure has the conductive film formed therein, a capacitor may be formed between the device isolation structure and the SOI substrate to enhance the isolation performance of the device isolation structure.
In accordance with the fourteenth aspect of the present invention, the first and second insulation films and the thermal oxide film can provide electrical isolation between the conductive film and the SOI substrate.
In accordance with the fifteenth aspect of the present invention, the first and second insulation films and the sidewall can provide electrical isolation between the conductive film and the SOI substrate.
It is therefore an object of the present invention to provide a method of manufacturing a semiconductor device which is capable of avoiding the formation of a damaged layer in a main surface of an SOI substrate when an isolating insulation film is formed on the main surface of the SOI substrate in a device isolation region, thereby to improve the reliability of a gate insulation film formed thereafter.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.